✦ Luna Orbit — Software Engineering

ASIC Verification Engineer

at Broadcom

📍 USA-CA Irvine Alton Parkway Bldg 2 Unknown 💰 $91K – $146K USD / year Posted March 25, 2026
Salary $91K – $146K USD / year
Type Full-Time
Experience mid
Exp. Years 3+ years
Education Master's in Electrical Engineering or Computer Science or Bachelor's in Electrical Engineering or Computer Science with 3+ years ASIC verification experience
Category Software Engineering

This role involves verifying high-speed communication ASICs, developing verification environments, and ensuring silicon success through comprehensive testing and validation.

  • Develop verification environments
  • Verify silicon at block and chip levels
  • Automate verification workflows
  • Collaborate with architecture and design teams
  • Ensure first-pass silicon success

The technical environment includes HDL languages (SystemVerilog, Verilog, VHDL), UVM methodology, scripting in Python, Perl, TCL, and ASIC design verification for high-performance PHYs.

The ideal candidate is a mid-level ASIC verification engineer with 3+ years of experience in verification using SystemVerilog, Verilog, or VHDL, and familiar with IEEE Ethernet protocols and UVM methodology. They are proactive, detail-oriented, and capable of developing verification environments for high-speed communication ASICs.

Proficiency in HDL languages (SystemVerilogVerilogor VHDL)ASIC verificationIEEE Ethernet protocolstestbench developmentverification environment design
Strong C/C++ skillsObject-Oriented Programmingscripting (PythonPerlTCL)
SystemVerilogVerilogVHDLUVMPythonPerlTCL
ASIC verificationSystemVerilogVerilogVHDLUVMIEEE Ethernet protocolstestbenchverification environmentscriptingASIC design
SystemVerilogVerilogVHDLPythonPerlTCLCC++IEEE Ethernet protocolsUVM
quick learnereffective communicationcollaborativemotivatedproblem-solving
Industry Semiconductor / Technology
Job Function ASIC verification engineer for high-speed interconnect products
Role Subtype System Administrator
Tech Domains Active Directory, Microsoft 365, Azure, Amazon Web Services, Kubernetes, Docker, Python, Java, SQL / PostgreSQL, Cybersecurity
ASIC verificationSystemVerilogVerilogVHDLUVMIEEE Ethernet protocolstestbenchverification environmentASIC designfull product development lifecyclePython scriptingPerl scriptingTCL scriptingCC++high speed interconnectPHYsPython

Lack of experience with HDL languages, No ASIC verification background, Inability to work with IEEE Ethernet protocols, No scripting experience in Python, Perl, or TCL

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