Position Details

Type Not Specified

Experience mid

Exp. Years Entry to mid-level

Education Bachelor's or Master's Degree in computer engineering/Electrical Engineering

Category System Administration

About this role

This role involves developing and debugging firmware and RTL code for SoC initialization and boot-media management, supporting verification and post-Silicon debug activities.

Key Responsibilities

Develop firmware for SoC init
Create unit test cases
Collaborate with SoC architecture team
Provide post-Si debug support
Perform coverage analysis

Technical Overview

Environment includes C/C++, Verilog, SystemVerilog, UVM, Linux, Windows, simulation and emulation tools, with a focus on ASIC verification, firmware debugging, and verification coverage.

Ideal Candidate

The ideal candidate is a mid-level firmware engineer with strong skills in ASIC verification, UVM, and RTL debugging, experienced with firmware and RTL simulation tools, and capable of working in a collaborative environment.

Must-Have Skills

Proficient in CC++VerilogSystemVerilogASIC verification experienceUVM testbench developmentDebugging firmware and RTLLinux and Windows environment experience

Nice-to-Have Skills

SoC resets and clockingPost-Silicon debugCoverage analysisAutomation workflowsSimulation acceleration

Tools & Platforms

VerilogSystemVerilogUVMLinuxWindowsSimulation toolsEmulation

Required Skills

CC++VerilogSystemVerilogASIC verificationUVMLinuxWindowssimulation toolspost-silicon debug

Hard Skills

CC++VerilogSystemVerilogASIC verificationUVMLinuxWindowsSimulation toolsPost-Silicon debugUVM testbenchesScripting languagesPerlRubyMakefileShellSoC resetsClockingInit flowBoot-mediaCoverage analysis

Soft Skills

Analytical skillsProblem-solvingCommunicationTeamworkLearning mindset

Industry & Role

Industry Technology

Job Function Develop and verify firmware and RTL for SoC boot and initialization

Role Subtype System Administration

Tech Domains Verilog, SystemVerilog, ASIC verification, UVM, Linux, Windows

Keywords for Your Resume

ASIC verificationUVMSystemVerilogVerilogCC++firmware debuggingRTL debuggingpost-silicon debugcoverage analysisSoC resetsclockinginit flowboot-mediasimulation toolsUVM testbenchesLinuxWindows

Deal Breakers

Lack of ASIC verification experience, No experience with UVM or SystemVerilog, Inexperience with firmware or RTL debugging

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