Position Details
About this role
This role involves verifying new microarchitectural features of AMD's next-generation x86 CPU cores using C++ and SystemVerilog, focusing on testbench development, debugging, and coverage closure.
Key Responsibilities
- Verify microarchitectural features
- Develop testbenches
- Debug simulation failures
- Drive coverage closure
- Collaborate with architects and RTL designers
Technical Overview
The position requires expertise in hardware verification, C++, SystemVerilog, and verification methodologies, working within a robust test environment to validate CPU core features.
Ideal Candidate
The ideal candidate is a mid-level verification engineer with experience in microarchitectural verification, C++, and SystemVerilog, capable of developing testbenches, debugging simulation failures, and driving coverage closure in a semiconductor environment.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
No experience with verification of microarchitectural features, Lack of C++ or SystemVerilog skills, No debugging experience, No verification environment knowledge
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