Position Details

Type Full-Time

Experience executive

Exp. Years Not specified

Education Not specified

Category Engineering (Non-Software)

About this role

AMD is hiring a Fellow-level Server CPU Validation Architect to lead validation strategy and execution for server CPU products. The role spans pre-silicon milestone review through post-silicon lab bring-up, emphasizing quality, debug efficiency, and a zero customer escape approach.

Key Responsibilities

Lead server CPU validation strategy across pre-silicon and post-silicon phases
Ensure controllability and observability for testing and debugging
Drive emulation readiness and efficient failure debug
Qualify design milestones for tape-out readiness with quality checklists
Own lab bring-up execution and role-model zero customer escape mentality

Technical Overview

You will ensure validation readiness through controllability and observability features, coordinate emulation content readiness, and drive post-silicon program ownership with tools and hooks such as DFx. The scope includes functional correctness, electrical compliance/margins, security validation, automation infrastructure, and at-scale validation clusters, culminating in tape-out readiness and lab bring-up execution.

Ideal Candidate

The ideal candidate is an expert validation leader who has owned post-silicon program execution for server CPU/platform programs end-to-end, with deep knowledge of server product architecture. They bring strong technical depth in controllability/observability, emulation readiness, and lab bring-up, and they have a demonstrated “zero customer escape” mindset backed by pre-silicon milestone qualification for tape-out readiness.

Must-Have Skills

Server CPU ValidationPost silicon program ownershipValidation methodologiesZero customer escape mentalityControllability and observability features for testing and debuggingIn-depth understanding of product architecture and its requirementsPre-silicon responsibility of reviewing design milestones and qualifying these milestones for tape-out readiness

Tools & Platforms

DFxEmulation

Required Skills

Server CPU Validationpost silicon validationtape-out readinessemulationcontrollability and observabilityDFxrandomizationautomation infrastructureat-scale validation clustersfunctional correctnesselectrical compliance/marginssecurity post-silicon validationbring-upquality checklistszero customer escape mentalitydesign milestones review

Hard Skills

Server CPU ValidationPost silicon validationProduct architecture understandingValidation methodologiesControllability and observabilityFunctional correctness validationElectrical compliance/marginsSecurity post-silicon validationEmulation content readinessEmulation debuggingDFxRandomizationFailure debugAutomation infrastructureAt-scale validation clustersDesign milestone reviewTape-out readiness qualificationZero customer escape mentalityBring-up execution in labQuality checklistsExecution excellenceInterfacing with engineering managers and program managers

Soft Skills

Business and technical acumenEngaging with global validation organizationsRole-modeling mindsetZero customer escape mentalityCollaborative communicationDirect and humble leadershipCross-functional teamworkMentoring/role modelingCollaborative creation of quality checklists

Industry & Role

Industry Manufacturing

Job Function Own and lead end-to-end server CPU validation execution and readiness from design milestones through post-silicon lab bring-up

Role Subtype Platform Engineer

Tech Domains Linux, QA & Testing

Keywords for Your Resume

Fellow Server CPU Validation ArchitectServer CPU Validation ArchitectCPU ValidationServer CPU Validationpost siliconpost-silicontape-out readinesstape-outemulation engineersemulationcontrollability and observabilityobservabilityDFxrandomizationautomation infrastructureat-scale validation clustersfunctional correctnesselectrical compliance/marginssecurity post-silicon validationbring-uplab bring-upzero customer escapequality checklistsdesign milestones

Deal Breakers

Must have post-silicon program ownership and experience with server CPU validation methodologies, Must demonstrate a zero customer escape mentality, Must have experience qualifying design milestones for tape-out readiness

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CPU Validation Architect, Fellow

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