Position Details

Type Not Specified

Experience mid

Exp. Years 5+ years

Education BS or higher degree in CS/EE/CE or equivalent experience

Category Cloud & Infrastructure

About this role

This role involves developing and optimizing FPGA-based dataflow pipelines at the hardware-software boundary, focusing on low-latency inference systems. The engineer will work on FPGA design, hardware acceleration, and co-design workflows.

Key Responsibilities

Build FPGA dataflow pipelines
Develop host-side drivers and runtimes
Collaborate with compiler and architecture teams
Optimize latency and resource usage
Build debugging and validation tools

Technical Overview

Proficiency in FPGA development using Verilog/VHDL, high-level synthesis, and FPGA toolchains. Experience with RTL design, timing analysis, and Linux-based development environments. Focus on hardware performance and resource optimization.

Ideal Candidate

The ideal candidate is an experienced FPGA hardware engineer with over 5 years in hardware dataflow, RTL design, and FPGA development. They should have hands-on experience with Verilog, VHDL, and FPGA toolchains, and be comfortable working across hardware and software boundaries.

Must-Have Skills

More than 5 years in FPGA developmenthardware dataflowor hardware/software co-designHands-on experience with RTL/HDL (VerilogVHDL)Proficiency in C/C++Familiarity with FPGA toolchainsExperience with Linux and scripting

Nice-to-Have Skills

High-Level SynthesisHardware performance analysisTiming closureCross-team collaboration

Tools & Platforms

VerilogVHDLHigh-Level SynthesisLinuxPCIeDMAVFIO

Required Skills

FPGAVerilogVHDLHigh-Level SynthesisRTLCC++PCIeDMAVFIOhardware/software co-designtiming analysisresource utilizationLinuxscripting

Hard Skills

FPGAVerilogVHDLHigh-Level SynthesisRTLCC++PCIeDMAVFIOHardware developmentHardware/software co-designTiming analysisResource utilizationLinuxScriptingVersion control

Soft Skills

communicationcollaborationproblem-solvinganalytical thinkingteamworkdetail-oriented

Industry & Role

Industry Technology / Hardware

Job Function Design and implement FPGA hardware dataflow systems

Role Subtype Hardware Dataflow Engineer

Tech Domains Verilog, VHDL, Linux, PCIe, DMA, VFIO

Keywords for Your Resume

FPGA developmentHardware dataflowRTLVerilogVHDLHigh-Level SynthesisFPGA toolchainsHardware/software co-designTiming analysisResource utilizationLinuxPCIeDMAVFIOHardware developmentHardware performanceData movementScriptingVersion controlfpgaverilogvhdlhigh-level synthesisrtlcc++pciedmavfio

Deal Breakers

Less than 5 years FPGA experience, No experience with RTL/HDL (Verilog, VHDL), Lack of FPGA toolchain knowledge, No experience with Linux or scripting

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