Position Details
About this role
This role involves designing high-speed datapaths and integrating PCIe and Ethernet protocols in FPGA or ASIC hardware. The engineer will debug and optimize digital systems for high-performance data movement.
Key Responsibilities
- Design high-speed datapaths
- Lead PCIe and Ethernet integration
- Debug hardware systems
- Optimize performance
- Collaborate with hardware teams
Technical Overview
The position requires expertise in SystemVerilog/Verilog, high-speed digital design, protocol integration (PCIe, Ethernet), and hardware debugging. Experience with FPGA/ASIC development and embedded micro-controllers is essential.
Ideal Candidate
The ideal candidate is a senior hardware design engineer with extensive experience in high-speed digital design, FPGA/ASIC development, and protocol integration, particularly PCIe and Ethernet. They possess strong debugging and performance tuning skills and have a background in digital logic and embedded micro-controllers.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Lack of experience with SystemVerilog or Verilog, No background in high-speed digital design, Less than 6 years of relevant industry experience, No experience with PCIe or Ethernet
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