Position Details
About this role
This role involves verifying networking ASIC designs using emulation platforms, developing test plans, and debugging hardware/software issues to ensure design correctness before manufacturing.
Key Responsibilities
- Verify chip architecture using emulation platforms
- Develop sub-system and chip-level tests
- Debug hardware/software issues
- Build and maintain emulation environments
- Collaborate with design and software teams
Technical Overview
The position requires expertise in ASIC verification, hardware emulation platforms like Zebu and Palladium, scripting for automation, and debugging complex hardware/software interactions.
Ideal Candidate
The ideal candidate is a mid-level emulation engineer with at least 2 years of experience in pre-silicon verification of networking ASICs, proficient in Verilog, SystemVerilog, C/C++, and scripting languages. They should have hands-on experience with emulation platforms like Zebu or Palladium and collaborate effectively with cross-functional teams.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Less than 2 years of ASIC verification experience, No experience with emulation platforms (Zebu, Palladium), Lack of knowledge in Verilog/SystemVerilog, No experience with ASIC design or verification
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