Position Details
About this role
Senior Reliability Engineer focusing on RF characterization and reliability testing for semiconductor devices used in wireless handset chipsets. Responsible for stress testing, failure analysis, and ensuring long-term device robustness.
Key Responsibilities
- Define stress tests
- Conduct failure analysis
- Develop RF characterization plans
- Perform wafer-level RF testing
- Lead troubleshooting efforts
Technical Overview
Environment involves RF CMOS technology, stress testing, failure analysis, thermal IR imaging, and wafer-level RF testing. Deep expertise in reliability principles and semiconductor physics required.
Ideal Candidate
The ideal candidate is a senior reliability engineer with extensive experience in RF and semiconductor reliability testing, including stress testing, failure analysis, and RF characterization at the wafer level. They possess deep technical expertise in RF CMOS technology and reliability principles, with strong analytical and collaboration skills.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Lack of experience in RF reliability testing, No semiconductor device physics background, Inability to perform failure analysis, No experience with wafer-level RF testing, Location outside San Jose, CA
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