Position Details
About this role
Design and optimize high-performance digital blocks for advanced semiconductor devices, focusing on layout, timing, and power efficiency.
Key Responsibilities
- Layout design
- Timing closure
- Verify LVS/DRC/ERC
- Analyze cell architectures
- Collaborate with design and foundry teams
Technical Overview
Perform physical implementation, timing closure, and trade-off analysis using place and route tools, verification tools, and collaboration with foundry and packaging teams.
Ideal Candidate
A highly experienced IC design engineer with over 7 years of expertise in physical implementation, semiconductor technologies, and high-performance core design, capable of leading complex layout and verification tasks.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Lack of experience with place and route tools, No advanced semiconductor technology experience, No relevant master's or PhD in engineering
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