Position Details
About this role
DFT Verification Engineer role focused on verifying advanced DFT functions for a next-generation low power, high-performance microprocessor. Responsibilities include developing test benches and ensuring test coverage across RTL and gate-level designs.
Key Responsibilities
- Verify advanced DFT functions (BIST, JTAG/IEEE 1500)
- Develop test benches and tests in Verilog/SystemVerilog/C++
- Define and implement test plans and coverage
- Write and maintain scripts
- Collaborate with architecture and design teams
Technical Overview
Hardware verification in digital design with emphasis on DFT methods, JTAG, BIST; coding in Verilog/SystemVerilog and C++ with scripting in Perl; interface with architects and circuit design teams.
Ideal Candidate
Entry-level DFT verification engineer with 0-2 years of experience, strong Verilog/SystemVerilog skills, and familiarity with JTAG and test technologies. Eager to learn and collaborate with architectural teams on next-generation processors.
Must-Have Skills
Nice-to-Have Skills
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Bachelor's degree not in EE/CE, Less than 0-2 years experience, Lack of Verilog/SystemVerilog experience
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