Position Details
About this role
Director-level role overseeing end-to-end pre-silicon verification across multiple silicon programs within a mixed-signal IP organization at AMD.
Key Responsibilities
- Execution Leadership
- Operational Excellence
- Technical Engagement & Oversight
- People & Organizational Leadership
- Stakeholder & Customer Alignment
- Prioritization & Multi-Program Management
Technical Overview
Leads verification strategy, test planning, coverage closure, and cross-functional execution; requires SystemVerilog/UVM expertise, mixed-signal verification familiarity, and non-trivial leadership across global teams.
Ideal Candidate
The ideal candidate is a senior engineering leader with a proven track record in pre-silicon verification for complex silicon programs, capable of guiding multiple IP/subsystem programs and leading large, global DV teams.
Must-Have Skills
Nice-to-Have Skills
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Lack of hands-on verification leadership, No track record of leading 20+ engineers, No degree in Electrical or Computer Engineering
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