✦ Luna Orbit — Engineering (Non-Software)

Untitled Position

at Company

Unknown Posted March 30, 2026
Type Full-Time
Experience executive
Exp. Years 0
Education Bachelor's or master's degree in Electrical Engineering or Computer Engineering
Category Engineering (Non-Software)

Director-level role overseeing end-to-end pre-silicon verification across multiple silicon programs within a mixed-signal IP organization at AMD.

  • Execution Leadership
  • Operational Excellence
  • Technical Engagement & Oversight
  • People & Organizational Leadership
  • Stakeholder & Customer Alignment
  • Prioritization & Multi-Program Management

Leads verification strategy, test planning, coverage closure, and cross-functional execution; requires SystemVerilog/UVM expertise, mixed-signal verification familiarity, and non-trivial leadership across global teams.

The ideal candidate is a senior engineering leader with a proven track record in pre-silicon verification for complex silicon programs, capable of guiding multiple IP/subsystem programs and leading large, global DV teams.

Bachelor's or Master's in Electrical Engineering or Computer EngineeringExperience in pre-silicon verificationSystemVerilog/UVM experienceability to lead teamsmulti-program managementstrong communicationstakeholder managementglobal teams
Mixed-signal verification (RNMAMS co-simulation) experienceExperience managing teams of 20+ engineersAbility to work across multiple concurrent programsStrong stakeholder managementStructure and metrics-based decision making
SystemVerilog SystemVerilog/UVM UVM verification methodology AMS co-simulation RNM Verilog RTL test planning debug leadership stakeholder management cross-functional
SystemVerilogSystemVerilog/UVMUVMcoverage-driven verificationAMS co-simulationRNMVerilog RTLverification strategytest planningdebug
leadershipcommunicationstakeholder managementteam buildingmentoringcross-functional collaborationproblem solvingexecutive presence
Industry Manufacturing
Job Function Lead end-to-end pre-silicon verification for multiple IPs/subsystems
Role Subtype Director-level engineer
pre-silicon verificationSystemVerilogSystemVerilog/UVMUVMverification methodologyAMS co-simulationRNMsilicon verificationleadershipexecution leadershipglobal teamsprogram managementstakeholder managementtest planningdebugcross-functionaltiming closureproduction tape-outverification leadership

Lack of hands-on verification leadership, No track record of leading 20+ engineers, No degree in Electrical or Computer Engineering

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