✦ Luna Orbit — Engineering (Non-Software)

Package Layout Design Engineer , Annapurna Labs - AI Silicon Packaging

at Amazon.com

📍 US, TX, Austin Unknown Posted March 27, 2026
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Position Details

Type Full-Time
Experience mid
Exp. Years 5+ years
Education Bachelor's degree in Electrical Engineering or a related field
Category Engineering (Non-Software)

About this role

This role involves designing and verifying advanced IC packages, including 2.5D/3D-IC and wafer-level packaging, supporting manufacturing and design closure processes.

Key Responsibilities

  • Execute package layout tasks
  • Collaborate with engineering teams
  • Support tape out and manufacturing
  • Perform design verification
  • Refine package stack-up definitions

Technical Overview

The technical environment includes physical design, package architecture, layout tools such as Cadence APD, Synopsys IC Packaging, Mentor Xpedition, and advanced packaging technologies.

Ideal Candidate

The ideal candidate is a mid-level engineer with at least 5 years of experience in IC package layout and physical design, familiar with advanced packaging technologies such as 2.5D/3D-IC and fan-out WLP. They should be proficient with industry-standard layout tools and capable of executing package designs from concept through tape out.

Must-Have Skills

Experience in IC package layoutPhysical design executionPackage design from concept to tape outExperience with advanced packaging technologiesHands-on with package layout tools

Nice-to-Have Skills

Design verificationDesign rule checksDFM refinementElectrical constraints integrationCross-level layout co-optimization

Tools & Platforms

Cadence APDSynopsys IC PackagingMentor Xpedition

Required Skills

IC package layoutphysical designfloor planningtape outmanufacturing releaseRDL routingsubstrate designverificationdesign rulesDFM complianceelectrical constraintsadvanced packaging technologies

Hard Skills

IC package layoutPhysical designFloor planningTape outManufacturing releaseRDL routingSubstrate designVerificationDesign rulesDFM complianceElectrical constraintsPackage architectures2.5D interposer3D-ICFan-out wafer-level packagingSilicon bridge technologiesCadence APDSynopsys IC PackagingMentor Xpedition

Soft Skills

CollaborationAttention to detailProblem-solvingTechnical communicationTeamwork

Industry & Role

Industry Semiconductors / Hardware
Job Function Designing and verifying advanced integrated circuit packages
Role Subtype Engineering (Non-Software)
Tech Domains Active Directory, Microsoft 365, Azure, Amazon Web Services, Google Cloud Platform, Linux, Windows Server, Kubernetes, Docker, Python

Keywords for Your Resume

IC package layoutPhysical designFloor planningTape outManufacturing releaseRDL routingSubstrate designVerificationDesign rulesDFM complianceElectrical constraintsPackage architectures2.5D interposer3D-ICFan-out wafer-level packagingSilicon bridge technologiesCadence APDSynopsys IC PackagingMentor Xpeditionphysical designfloor planningtape outmanufacturing releasesubstrate designverificationdesign rules

Deal Breakers

Less than 5 years of experience in IC package layout, Lack of hands-on experience with package layout tools, No familiarity with advanced packaging technologies, Inability to work independently on complex designs

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