✦ Luna Orbit — Cloud & Infrastructure

Physical Design Engineer, Annapurna Labs

at Amazon.com

📍 US, CA, Cupertino Unknown Posted March 13, 2026
Type Not Specified
Experience mid
Exp. Years Not specified
Education Not specified
Category Cloud & Infrastructure

This role involves designing and optimizing hardware for AWS data centers, focusing on ASIC physical design, integration, and verification processes.

  • Drive architectural feasibility studies
  • Implement physical design for ASICs
  • Perform synthesis, floor planning, and place and route
  • Ensure timing closure and physical verification
  • Evaluate third-party IP

ASIC physical design, RTL collaboration, floor planning, synthesis, place and route, timing closure, physical verification, and IP evaluation within a high-performance computing environment.

The ideal candidate is an ASIC physical design engineer with experience in RTL collaboration, physical implementation, and timing closure. They should be skilled in ASIC methodologies, physical verification, and working within a team environment to support innovative chip designs.

RTL/logic design collaborationPhysical implementation of ASICsFloor planningSynthesisPlace and routePower and clock distributionTiming closurePhysical verificationIR drop analysisECO and sign-off processes
3rd party IP evaluationHardware architectureASIC design methodologiesTeam collaboration
Synthesis toolsFloor planning toolsPlace and route toolsPhysical verification tools
ASICRTLPhysical DesignFloor PlanningSynthesisPlace and RouteTiming ClosurePhysical VerificationIR Drop AnalysisECOSign-offIP evaluation
ASICApplication-Specific Integrated CircuitsRTLLogic DesignPhysical DesignFloor PlanningSynthesisPlace and RoutePower-Performance-Area tradeoffsTiming ClosureIR Drop AnalysisPhysical VerificationECOSign-offIP evaluation
CollaborationTeamworkMentorshipKnowledge-sharingCommunicationProblem-solvingAdaptability
Industry Technology / Cloud Computing / Data Centers
Job Function ASIC physical design and optimization for cloud infrastructure
ASICApplication-Specific Integrated CircuitsRTLLogic DesignPhysical DesignFloor PlanningSynthesisPlace and RoutePower-Performance-Area tradeoffsTiming ClosureIR Drop AnalysisPhysical VerificationECOSign-offIP evaluationCollaborationMentorshipTeamwork

Lack of ASIC physical design experience, No knowledge of RTL or physical verification, Inability to collaborate with RTL/logic teams, Failure to meet design quality standards

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