Position Details
About this role
This role involves leading physical IC design activities from RTL to tape-out, including synthesis, verification, and physical implementation for advanced semiconductor products.
Key Responsibilities
- Execute physical design and verification
- Manage timing closure
- Develop flow and methodology
- Perform EM/IR analysis
- Coordinate layout and tape-out processes
Technical Overview
The position requires expertise in physical design, scripting with TCL/PERL, EDA tools, and full chip flow management, focusing on high-performance ASIC development.
Ideal Candidate
The ideal candidate is a senior physical IC design engineer with over 12 years of experience in physical design, RTL synthesis, and tape-out processes. They are proficient in scripting with TCL/PERL and have extensive experience with EDA tools and full physical design cycles.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Less than 12 years of relevant experience, No proficiency in TCL or PERL scripting, Lack of full physical design cycle experience, No experience with RTL to tape-out, Educational background outside Electrical/Electronics Engineering
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