✦ Luna Orbit — Engineering (Non-Software)

Physical IC Design Engineer

at Broadcom

📍 USA-California-San Jose-1320 Ridder Park Drive Unknown 💰 $141K – $226K USD / year Posted March 13, 2026
Salary $141K – $226K USD / year
Type Full-Time
Experience mid
Exp. Years 12+ years
Education Bachelor's in Electrical Engineering or Electronics Engineering
Category Engineering (Non-Software)

This role involves leading physical IC design activities from RTL to tape-out, including synthesis, verification, and physical implementation for advanced semiconductor products.

  • Execute physical design and verification
  • Manage timing closure
  • Develop flow and methodology
  • Perform EM/IR analysis
  • Coordinate layout and tape-out processes

The position requires expertise in physical design, scripting with TCL/PERL, EDA tools, and full chip flow management, focusing on high-performance ASIC development.

The ideal candidate is a senior physical IC design engineer with over 12 years of experience in physical design, RTL synthesis, and tape-out processes. They are proficient in scripting with TCL/PERL and have extensive experience with EDA tools and full physical design cycles.

Minimum Bachelor's in Electrical/Electronics Engineering12+ years relevant experienceProficiency in TCL/PERL scriptingExperience with EDA toolsFull physical design cycle experienceRTL to Tape-out
Flow and Methodology DevelopmentTiming Closure strategiesEM/IR AnalysisPlace and RouteClock Tree SynthesisFloor-planningLayout
TCLPERLEDA Tools
Physical DesignRTLSynthesisVerificationTiming ClosureEM/IRPlace and RouteClock Tree SynthesisFloor-planningLayoutTCLPERLEDA Tools
Physical DesignRTLSynthesisPhysical VerificationTiming ClosureEM/IR AnalysisPlace and RouteClock Tree SynthesisFloor-planningLayoutFlow DevelopmentMethodology DevelopmentTCLPERLEDA ToolsFull Physical Design Cycle
Verbal CommunicationWritten CommunicationCollaborationProblem-solving
Industry Technology, Semiconductor, Data Center
Job Function Physical IC design and implementation for semiconductor devices
Physical DesignRTLSynthesisPhysical VerificationTiming ClosureEM/IR AnalysisPlace and RouteClock Tree SynthesisFloor-planningLayoutFlow DevelopmentMethodology DevelopmentTCLPERLEDA ToolsRTL to Tape-out

Less than 12 years of relevant experience, No proficiency in TCL or PERL scripting, Lack of full physical design cycle experience, No experience with RTL to tape-out, Educational background outside Electrical/Electronics Engineering

Apply for this Position →

Get matched to jobs like this

Luna finds roles that fit your skills and career goals — no endless scrolling required.

Create a Free Profile