Position Details

Type Not Specified

Experience lead

Exp. Years 15+ years

Education Not specified

Category Engineering (Non-Software)

About this role

This role involves leading RTL development and physical implementation for high-speed SoC designs, optimizing power, performance, and area, and ensuring timely design closure through methodology and automation.

Key Responsibilities

Lead RTL optimization
Drive physical implementation
Ensure design closure
Mentor engineering teams
Develop automation scripts

Technical Overview

The position requires deep expertise in RTL design, physical implementation, synthesis, timing closure, and automation scripting using TCL and Python, with a focus on high-speed (>2GHz) chip designs.

Ideal Candidate

The ideal candidate is a highly experienced physical implementation architect with over 15 years in RTL development, physical design, and optimization for high-speed SoC designs, capable of leading complex projects and mentoring teams.

Must-Have Skills

RTL developmentphysical implementationRTL optimizationpowerperformancearea (PPA)physical design closure

Nice-to-Have Skills

automation scriptingIC designhigh-speed designtiming closuremethodology development

Tools & Platforms

RTL toolssynthesisfloor planningplacementclock tree synthesisroutingtiming analysisautomation scriptingTCLPython

Required Skills

RTL developmentphysical implementationRTL optimizationpowerperformanceareaphysical design closureRTL synthesisfloor planningplacementclock tree synthesisroutingtiming closureautomation scripting

Hard Skills

RTL developmentPhysical ImplementationRTL optimizationPhysical DesignPowerPerformanceArea (PPA)RTL synthesisFloor planningPlacementClock tree synthesisRoutingFull-chip timingClosureAutomation scriptsIC designHigh-speed design

Soft Skills

leadershipmentoringtechnical directioncollaborationproblem-solving

Industry & Role

Industry Technology

Job Function Leading RTL physical implementation for high-speed SoC designs

Role Subtype Engineering (Non-Software)

Tech Domains RTL, Physical Design, IC Design

Keywords for Your Resume

RTL developmentphysical implementationRTL optimizationpower performance areaphysical design closureRTL synthesisfloor planningplacementclock tree synthesisroutingtiming closureautomation scriptsIC designhigh-speed designPPASoCRTL engineerPhysical Implementation Architect

Deal Breakers

Less than 15 years of experience, Lack of expertise in RTL physical implementation, No background in high-speed IC design

Apply for this Position →

Get matched to jobs like this

Luna finds roles that fit your skills and career goals — no endless scrolling required.

Create a Free Profile