Position Details
About this role
This role involves building and validating models of SoC subsystems to support silicon design, verification, and performance evaluation before fabrication.
Key Responsibilities
- Build and own SoC models
- Validate models against RTL
- Support pre-silicon verification
- Develop test infrastructure
- Collaborate with chip architects
Technical Overview
The technical environment includes C++, SystemC, RTL, ASIC design, and verification tools, focusing on accurate modeling and validation of hardware architectures.
Ideal Candidate
The ideal candidate is a mid-level hardware modeling engineer with 2+ years of experience in performance and functional modeling of SoCs, ASICs, or GPUs. They should be proficient in C++, SystemC, and verification methodologies, with a strong understanding of architecture and verification processes.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
No experience with performance or functional modeling, Lack of proficiency in C++ or SystemC, No background in chip verification or architecture, No experience translating architecture specs into models
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