✦ Luna Orbit — Engineering (Non-Software)

R&D Hardware Design Engineer (High Speed Analog)

at VMware

📍 USA-CA Irvine Alton Parkway Bldg 2 Unknown 💰 $108K – $172K USD / year Posted March 13, 2026
Salary $108K – $172K USD / year
Type Full-Time
Experience mid
Exp. Years 8+ years
Education Bachelor's degree in Engineering/Computer Science and 8+ years of related experience or Masters degree in Engineering/Computer Science and 6+ years of related experience
Category Engineering (Non-Software)

This role involves designing and evaluating high-speed analog electronic components for advanced hardware systems, focusing on transceivers and optical communication modules.

  • Design high-speed analog circuits
  • Evaluate electronic components
  • Analyze equipment performance
  • Review vendor capabilities
  • Collaborate with cross-functional teams

The position requires expertise in high-speed analog circuit design, PLLs, jitter reduction, optical links, and CAD tools for hardware development.

The ideal candidate is a senior hardware engineer with extensive experience in high-speed analog circuit design, particularly for wireline transceivers operating above 10Gbps and 28GHz. They possess strong analytical skills, familiarity with PLLs, low jitter design, and optical communication techniques.

High-Speed ADC and DAC DesignPLL DesignLow Jitter PLLAnalog Circuit DesignElectrical Engineering
Optical LinksBackplane EqualizationLaser Driver DesignData Recovery Circuits
CAD tools
High-Speed ADCDACPLL DesignLow JitterAnalog Circuit DesignOptical LinksBackplane EqualizationLaser DriverData RecoveryCAD tools
High-Speed ADCAnalog Circuit DesignDACPLL DesignLow JitterTHDEqualization TechniquesClock & Data RecoveryCAD tools
Problem-solvingJudgmentRelationship BuildingAnalysisCollaboration
Industry Technology
Job Function Design and develop high-speed analog electronic hardware for communication systems
High-Speed ADCAnalog Circuit DesignDACPLL DesignLow JitterTHDOptical LinksBackplane EqualizationLaser DriverClock & Data RecoveryCAD toolsHigh-Speed (>10Gbps)High-Speed (>28GHz)Low Jitter (<100fs-rms)Data Recovery

Less than 6 years of relevant experience, Lack of experience with high-speed analog design, No background in PLL or jitter reduction, No degree in Engineering or related field

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