✦ Luna Orbit — Software Engineering

R&D IC Systems Engineer

at Broadcom

📍 2 Locations Unknown 💰 $108K – $172K USD / year Posted March 13, 2026
Salary $108K – $172K USD / year
Type Full-Time
Experience mid
Exp. Years 8+ years
Education Bachelor's in Electrical Engineering or Electronics Engineering
Category Software Engineering

This role involves designing and verifying high-speed physical layer transceivers for fiber optical communication systems, focusing on DSP algorithms and ASIC implementation.

  • Develop system specifications
  • Design chip architecture
  • Model and simulate communication algorithms
  • Perform lab testing and debugging
  • Document design and test plans

The position requires expertise in ASIC design, system modeling with MATLAB/Simulink, RTL coding, and lab testing within communication and signal processing environments.

The ideal candidate is a senior-level IC Systems Engineer with extensive experience in digital signal processing, ASIC design, and system simulation. They possess strong lab skills, proficiency in MATLAB/Simulink, and a solid understanding of communication systems, with at least 6 years of relevant experience.

Bachelor's degree in Electrical Engineering or related field8+ years of related experienceKnowledge in Communication TheoryDigital Signal Processing algorithmsMATLAB/SimulinkC/C++/JavaPythonUnixLinuxRTL coding expertise
Experience in ASIC architectureAnalog circuit behaviorTransmission line theoryS-parametersLab hands-on skills
MATLABSimulinkCC++JavaPythonUnixLinux
ASICMATLABSimulinkCC++JavaPythonUnixLinuxDSPCommunication TheoryRTLVerification
MATLABSimulinkCC++JavaPythonUnixLinuxDigital Signal ProcessingCommunication TheoryRTL codingASIC designVerificationLab testingSystem simulation
CommunicationTeamworkProblem-solvingDocumentationLab skills
Industry Telecom, Networking & Communications
Job Function End-to-end communication system design and ASIC development
ASICApplication-Specific Integrated CircuitMATLABSimulinkCC++JavaPythonUnixLinuxDigital Signal ProcessingCommunication TheoryRTL codingVerificationLab testingSystem simulation

Less than 6 years of relevant experience, Lack of ASIC or FPGA design experience, No proficiency in MATLAB/Simulink, No experience with RTL coding, Educational background outside Electrical/Electronics Engineering

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