✦ Luna Orbit — Software Engineering

R&D Systems Applications Engineer (SAE)

at VMware

📍 USA-California-San Jose-1320 Ridder Park Drive Unknown 💰 $141K – $226K USD / year Posted March 25, 2026
Salary $141K – $226K USD / year
Type Full-Time
Experience mid
Exp. Years 3+ years
Education BSEE/CS with 3+ years of ASIC Design/Verification experience
Category Software Engineering

This role involves verifying high-speed ASIC designs, debugging PCIe protocols, and analyzing hardware signals to ensure silicon quality and performance.

  • Verify ASIC silicon designs
  • Debug PCIe protocol issues
  • Analyze hardware signals
  • Collaborate with design teams
  • Develop debug tools

The environment includes firmware development, hardware analysis, PCIe protocol debugging, and embedded software tools, focusing on ASIC verification.

The ideal candidate is a mid-level embedded software engineer with experience in firmware, PCIe protocol debugging, and hardware integration, capable of analyzing complex signals and working with ASIC verification processes.

Firmwarehost softwarehardwarePCIe protocol debugC programmingembedded softwareboard schematicslayout filesHW/PCBAdebugginganalog signals
PCIe technologydebug software developmentprotocol analysistrace capture
Cembedded softwarePCIe
Firmwarehost softwarehardwarePCIeCembedded softwaredebuggingboard schematicslayout filesHW/PCBAanalog signalsprotocol analysistrace analysis
Firmwarehost softwarehardwarePCIePCIe protocolCC programmingembedded softwaredebuggingboard schematicslayout filesHW/PCBAanalog signalsdebug analysissoftware developmentprotocol analysistrace analysis
organizationcommunicationself-motivationlearningproblem-solving
Industry Technology
Job Function ASIC verification and signal analysis
Role Subtype Embedded Software Engineer
Tech Domains Firmware, host software, hardware, PCIe
Clearance Required None
Visa Sponsorship No
firmwarehost softwarehardwarepciepci e protocol debugcembedded softwaredebuggingboard schematicslayout fileshw/pcbaanalog signalsprotocol analysistrace analysisPCIeCHW/PCBA

Less than 3 years of ASIC verification experience, No PCIe protocol debugging experience, Lack of embedded software skills, Inability to work with hardware schematics

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