✦ Luna Orbit — AI & Machine Learning

Senior ASIC Design/DV and AI Engineer

at Analog Devices

📍 4 Locations Unknown Posted March 27, 2026
Type Not Specified
Experience mid
Exp. Years 3+ years
Education Not specified
Category AI & Machine Learning

This role involves leading the development and integration of AI-driven tools for ASIC design and verification, focusing on accelerating verification workflows and deploying formal methods. The engineer will work across digital architecture, embedded software, and verification domains.

  • Develop AI-driven verification tools
  • Integrate AI/ML into ASIC workflows
  • Deploy formal verification methods
  • Connect AI tools with engineering domains
  • Enhance verification accuracy

The technical environment includes ASIC design, SystemVerilog, UVM, formal verification tools, and AI/ML frameworks to enhance hardware verification processes and digital design workflows.

The ideal candidate is an experienced ASIC design and verification engineer with strong knowledge of AI and ML applications in hardware development. They should have expertise in SystemVerilog, UVM, and formal verification, with the ability to develop AI-driven verification tools and connect them across engineering domains.

Experience in ASIC design and verificationKnowledge of AI/ML applications in hardware designDevelopment and deployment of AI-driven toolsExperience with SystemVerilog and UVMAbility to connect AI tools with engineering domainsStrong problem-solving skills
Experience with formal verificationKnowledge of embedded softwareFamiliarity with agentic AI methodsAutomation scripting in IC designExperience in digital design workflows
SystemVerilogUVMFormal Verification toolsAI/ML frameworksIC design tools
ASIC designverificationAIMLSystemVerilogUVMformal verificationdigital architectureembedded softwareagentic AI
ASIC designVerificationAIMLSystemVerilogUVMFormal VerificationDigital ArchitectureEmbedded SoftwareAgentic AIAutomation scriptsSystem architectureDesign verification
CollaborationInnovationProblem-solvingAdaptabilityTechnical communication
Industry Semiconductors
Job Function ASIC design and verification with AI/ML integration
Role Subtype AI & Machine Learning
Tech Domains SystemVerilog, UVM, Formal Verification, AI, ML
ASIC designVerificationAIMLSystemVerilogUVMFormal VerificationDigital ArchitectureEmbedded SoftwareAgentic AIAutomation scriptsSystem architectureDesign verificationverificationformal verificationdigital architectureembedded softwareagentic ai

Lack of ASIC design or verification experience, No knowledge of AI/ML applications, No experience with SystemVerilog or UVM, Lack of problem-solving skills in hardware verification

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