✦ Luna Orbit — Engineering (Non-Software)

Senior CPU Power Management Architect

at Intel

📍 2 Locations Hybrid 💰 $190K – $361K USD / year Posted April 03, 2026
Salary $190K – $361K USD / year
Type Not Specified
Experience senior
Exp. Years 10+ years
Education BS in electrical and computer engineering
Category Engineering (Non-Software)

Senior CPU Power Management Architect at Intel, responsible for shaping end-to-end CPU power management microarchitecture across hardware and software interfaces, with emphasis on DVFS, C/P-states, thermal controls, and ML-based power optimization.

  • Define end-to-end CPU power management microarchitecture
  • Explore novel power/thermal management solutions
  • Collaborate with RTL/design/firmware teams
  • Review roadmaps and influence cross-functional plans
  • Participate in post-silicon debug and tuning

Leads architecture specifications for power and thermal management; collaborates with RTL designers, SoC architects, and firmware/OS teams; oversees post-silicon debugging and pre-silicon modeling to minimize discrepancies between projections and hardware results.

The ideal candidate is a senior electrical/computer engineer with 10+ years in CPU/SOC power and thermal architecture, experienced in RTL development and SystemVerilog, and capable of cross-functional leadership across hardware, firmware, and software teams.

BS in electrical and computer engineering10+ years of experience working in CPU and SOC power management and thermal management architecture
Strong analytical and problem-solving skillsEffective collaboration across teamsPassion for driving innovation
BS in electrical and computer engineering; 10+ years in CPU and SOC power management and thermal management architecture; RTL development; SystemVerilog; DVFS; C-states; P-states; thermal management; hardware/firmware/software co-design; post-silicon tuning
CPU architectureRTL developmentSystemVerilogMicroarchitectureDVFSC-statesP-statesThermal managementPower deliveryPower gatingTelemetryDebugMachine learning for power and performanceCo-design (hardware/firmware/software)
Analytical thinkingProblem-solvingCross-functional collaborationLeadershipCommunication
Industry Technology
Job Function Define and drive CPU power management architecture for high-performance and low-power CPUs
Role Subtype CPU architecture
Tech Domains Python, Linux, Tableau, Power BI, SQL / PostgreSQL
senior cpu power management architectcpu power managementmicroarchitecturertl developmentsystemverilogso c power managementthermalsdvfsc-statesp-statespower deliverypower gatingtelemetrydebugmachine learning for power and performancehardware-software co-designpost-silicon debugpre-silicon modelingaustinthermal management

BS in electrical and computer engineering, 10+ years experience in CPU/SOC power and thermal architecture, SystemVerilog and RTL development experience

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