Position Details

Type Full-Time

Experience senior

Exp. Years Not specified

Education Undergrad degree required. Masters degree or related in computer engineering/Electrical Engineering is preferred.

Category Engineering (Non-Software)

About this role

GPU/graphics FPGA design verification engineer focused on end-to-end verification of advanced features using HDL, UVM, and FPGA toolchains.

Key Responsibilities

Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified
Build test plan documentation accounting for interactions with other features, hardware, firmware, and software driver use cases
Build directed and random verification tests
Debug test failures with RTL/firmware engineers
Review functional and code coverage metrics

Technical Overview

Hands-on RTL/firmware verification across Verilog/SystemVerilog/VHDL with Linux/Windows environments, UVM-based testbenches, and Xilinx Vivado workflow.

Ideal Candidate

Candidate with strong HDL design and verification experience, including Verilog/SystemVerilog/VHDL, UVM, and FPGA toolchains, who can work across Linux/Windows environments and mentor others.

Must-Have Skills

Proficient in IP level ASIC verificationProficient in debugging firmware and RTL code using simulation toolsProficient in using UVM testbenchesExperience with VerilogSystem VerilogCand C++Experience with Linux environments

Nice-to-Have Skills

Experience with Xilinx Ultrascale or Versal FPGAsVivado and Vivado DebugKnowledge of high-speed interfaces (QSFPPCIeUSBSATAGB EthernetDDR4/5)SystemC and TLMScripting (PerlRubyMakefileshell)

Tools & Platforms

VerilogSystemVerilogVHDLLinuxWindowsVivadoXilinxUVMPerlRubyMakefilesShell

Required Skills

Proficient in IP level ASIC verificationProficient in debugging firmware and RTL code using simulation toolsProficient in using UVM testbenchesExperienced with VerilogSystem VerilogCand C++Linux and Windows environmentsVerilog/SystemVerilog/VHDLUVMtestbenchesVivadoXilinx

Hard Skills

VerilogSystemVerilogVHDLLinuxWindowsUVMCC++VivadoXilinxVerilog/SystemVerilog environmentsHDLtestbenchesQtPythonPerlRubyMakefilesshellScripting

Soft Skills

team collaborationcommunicationproblem-solvingwillingness to learnmentorship

Industry & Role

Industry Technology

Job Function Plan, build, and execute verification of new and existing features for AMD's graphics processor IP and silicon.

Role Subtype Verification Engineer

Tech Domains Verilog, SystemVerilog, VHDL, Linux, Windows, Vivado, Xilinx

Keywords for Your Resume

GPU design verification engineerip level asic verificationuvm testbenchesverilogsystemverilogvhdlccpplinuxwindowsvivadoxilinxversaLultrascalehdltestbenchrtltiming reportsclock domain crossingscriptingperLrubyshellvivado debuguvm

Deal Breakers

Undergraduate degree required; Masters preferred, Experience with FPGA tools (Vivado) and Xilinx platforms

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