Position Details
About this role
This role involves building and validating models of ML accelerators and silicon subsystems to support design, verification, and performance evaluation before chip fabrication.
Key Responsibilities
- Build and own models of SoC subsystems
- Validate models against RTL
- Develop test infrastructure
- Support performance modeling
- Collaborate with chip architects
Technical Overview
The environment includes C++, RTL, silicon verification tools, and hardware modeling, focusing on pre-silicon validation, performance analysis, and chip design.
Ideal Candidate
The ideal candidate is a senior engineer with 6+ years of experience in silicon modeling, verification, and hardware design, proficient in C++ and familiar with ML accelerators and ASIC development.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Lack of experience with silicon modeling, No proficiency in C++, No verification experience, Poor collaboration skills
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