✦ Luna Orbit — Software Engineering

Senior Serdes System Design Engineer/Architect

at VMware

📍 3 Locations Unknown 💰 $108K – $192K USD / year Posted March 26, 2026
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Position Details

Salary $108K – $192K USD / year
Type Full-Time
Experience senior
Exp. Years 6+ years
Education B.S.E.E. plus 8+ years OR M.S.E.E. plus 6 years
Category Software Engineering

About this role

This role involves designing and verifying high-speed Serdes modules for optical and wireline communication systems, focusing on signal processing algorithms and compliance with industry standards.

Key Responsibilities

  • Develop signal processing algorithms
  • Design high-speed Serdes
  • Verify designs
  • Collaborate with analog and digital teams
  • Support lab testing and customer support

Technical Overview

The position requires expertise in MATLAB, C/C++, digital signal processing, analog circuit analysis, and high-speed communication standards such as IEEE 802.3 and OIF. Experience with ASIC design and verification is essential.

Ideal Candidate

The ideal candidate is a senior signal processing engineer with expertise in high-speed Serdes, MATLAB, C/C++, and analog/digital circuit analysis. They have experience with high-speed communication standards and verification processes.

Must-Have Skills

MATLABCC++Digital Signal ProcessingRTL coding

Nice-to-Have Skills

high-speed Clock and Data Recovery PLLsequalization techniquesIEEE 802.3OIF standardsPCIe Gen6/Gen7

Tools & Platforms

MATLABCC++

Required Skills

MATLABCC++Digital Signal Processinganalog circuittransmission line theorys-parametershigh-speed Clock and Data Recovery PLLsequalization techniquesRTL codingIEEE 802.3OIF standardsPCIe Gen6Gen7 standards

Hard Skills

MATLABCC++Digital Signal ProcessingAnalog circuit behaviorTransmission line theorys-parametersHigh-speed Clock and Data Recovery PLLsEqualization techniquesRTL codingIEEE 802.3OIF 100G/200G/400G Serdes standardsPCIe Gen6Gen7 standards

Soft Skills

collaborationlab testingdebuggingdocumentationcustomer support

Industry & Role

Industry Technology
Job Function Design and verification of high-speed Serdes modules
Role Subtype Serdes System Design Engineer
Tech Domains Active Directory, Microsoft 365, Azure, Amazon Web Services, Linux

Keywords for Your Resume

MATLABCC++Digital Signal Processinganalog circuittransmission line theorys-parametershigh-speed Clock and Data Recovery PLLsequalization techniquesRTL codingIEEE 802.3OIF 100G/200G/400G Serdes standardsPCIe Gen6Gen7 standardshigh-speed Serdessignal processing algorithmsASIC designverificationlab testingdigital communicationOIF standards

Deal Breakers

Less than 6 years relevant experience, No experience with high-speed Serdes or signal processing, Lack of MATLAB or C/C++ skills, No familiarity with IEEE 802.3 or OIF standards

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