Position Details
About this role
This role involves performing signal and power integrity analysis and optimization for advanced semiconductor packaging solutions, supporting next-generation ASICs and data center hardware.
Key Responsibilities
- Perform package-level SI/PI simulations
- Support package stack-up design
- Run high-speed channel simulations
- Model advanced interconnects
- Build and validate models
Technical Overview
The technical environment includes SI/PI simulations, modeling of microbump and interconnect technologies, and advanced packaging techniques such as 3D-IC and fan-out architectures.
Ideal Candidate
The ideal candidate is a mid-level engineer with experience in signal and power integrity analysis, simulation, and modeling for advanced packaging solutions in semiconductor environments. They should have a strong understanding of high-speed interconnects and packaging technologies.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Lack of experience in SI/PI analysis, No background in advanced packaging, No simulation/modeling skills
Get matched to jobs like this
Luna finds roles that fit your skills and career goals — no endless scrolling required.
Create a Free Profile