Position Details

Salary $105K – $149K USD / year

Type Full-Time

Experience mid

Exp. Years Entry to mid-level

Education Bachelor's in Electrical Engineering, Computer Engineering, Computer Science or related field

Category Software Engineering

About this role

Join Intel as a SoC Logic Design Engineer to develop and verify complex system-on-chip components, focusing on RTL coding, integration, and physical implementation.

Key Responsibilities

Develop RTL designs
Integrate IP blocks
Perform verification and quality checks
Optimize logic for power and performance
Collaborate with IP providers

Technical Overview

Role involves designing, coding, and simulating logic architectures using SystemVerilog and Verilog, integrating IP blocks, and ensuring design security and performance.

Ideal Candidate

The ideal candidate is a mid-level hardware design engineer with experience in RTL coding, verification, and SoC architecture, proficient in SystemVerilog and scripting languages, with a focus on physical implementation and security considerations.

Must-Have Skills

Proficiency in scripting languages such as PythonPerlStrong understanding of SystemVerilog and VerilogExperience with RTL designKnowledge of digital design fundamentalsExperience with hardware design and debugging

Nice-to-Have Skills

Experience in UPF codingKnowledge of physical connectivity and verification methodologiesDesign integrity for physical implementation

Tools & Platforms

industry-standard simulation toolsverification tools

Required Skills

SystemVerilogVerilogRTL designPythonPerlhardware designmicroarchitecturesimulationpower managementUPF coding

Hard Skills

SystemVerilogVerilogRTL designPythonPerlHardware designMicroarchitectureSimulationPower managementUPF coding

Soft Skills

collaborationproblem-solvingcommunicationteamworkattention to detail

Industry & Role

Industry Semiconductors & Hardware

Job Function Design and verify logic architectures for System-on-Chip components

Role Subtype Systems Engineer

Tech Domains Active Directory, Microsoft 365, Azure, Amazon Web Services, Linux

Keywords for Your Resume

SystemVerilogVerilogRTL designhardware designmicroarchitecturesimulationpower managementUPF codingPythonPerldigital designverificationsecurity threat modelsASICSoCintegrate IPphysical implementation

Deal Breakers

Lack of experience with SystemVerilog or Verilog, No hardware design background, No experience with RTL verification, Bachelor's degree not in relevant field

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SOC Logic Design Engineer

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