Position Details

Type Full-Time

Experience senior

Exp. Years 7+ years

Education Bachelor's in Electrical or Communications Engineering

Category Engineering (Non-Software)

About this role

This role involves verifying ASIC designs for satellite communication hardware, ensuring functional correctness through advanced verification environments and methodologies.

Key Responsibilities

Develop verification environment
Run regressions
Participate in ASIC validation
Ensure coverage
Collaborate with design teams

Technical Overview

Focus on ASIC verification using Verilog, SystemVerilog, UVM, SystemC, and Matlab, with responsibilities including test plan development, regression testing, and formal verification in aerospace communication systems.

Ideal Candidate

The ideal candidate is a senior verification engineer with over 7 years of experience in ASIC and communication system verification, proficient in Verilog, SystemVerilog, and UVM, with strong communication skills and familiarity with Matlab. Advanced degrees are preferred for seniority.

Must-Have Skills

7+ years of verification experience in communication systemsExperience with Verilog/SystemVerilogExperience with UVMSystemCDPI-CFamiliarity with MatlabStrong communication skills

Nice-to-Have Skills

Master's or Ph.D. in Electrical Engineering10+ years in digital verificationModem design verification experienceSystemC or Matlab model developmentFormal verification techniques

Tools & Platforms

VerilogSystemVerilogUVMSystemCDPI-CMatlab

Required Skills

ASIC Design VerificationVerificationVerilogSystemVerilogUVMSystemCDPI-CMatlabFormal VerificationDigital VerificationEmbedded ProcessorsHigh-Speed InterfacesModem DesignTest PlansRegression TestingCoverage Matrices

Hard Skills

ASIC Design VerificationVerilogSystemVerilogUVMSystemCDPI-CMatlabFormal VerificationDigital VerificationEmbedded ProcessorsHigh-Speed InterfacesModem DesignTest PlansRegression TestingCoverage Matrices

Soft Skills

CommunicationCollaborationProblem-solvingAttention to detailDocumentation skills

Industry & Role

Industry Aerospace

Job Function Verify ASIC designs for satellite communication hardware

Keywords for Your Resume

ASIC Design Verification EngineerVerificationVerilogSystemVerilogUVMSystemCDPI-CMatlabFormal VerificationDigital VerificationEmbedded ProcessorsHigh-Speed InterfacesModem DesignTest PlansRegression TestingCoverage MatricesASIC Design Verification

Deal Breakers

Less than 7 years verification experience, Lack of experience with Verilog or SystemVerilog, No familiarity with UVM or SystemC, No experience with Matlab

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