✦ Luna Orbit — Engineering (Non-Software)

Sr. Formal Verification Engineer, Annapurna Labs

at Amazon.com

📍 US, WA, Seattle Unknown Posted April 14, 2026
Type Full-Time
Experience senior
Exp. Years Not specified
Education Bachelor's degree or above in computer science, electrical engineering, or related
Category Engineering (Non-Software)

As a Sr. Formal Verification Engineer for Annapurna Labs, you will develop formal verification plans and verify state-of-the-art IP architectures for AWS cloud server infrastructure. You will create checking algorithms, assertions, and FV models, and partner with block designers to ensure coverage through test plan and simulation strategy.

  • Develop formal verification plans and implement/verify IP architectures
  • Create checking algorithms, assertions, and FV models
  • Apply formal methods and abstraction techniques
  • Participate in test plan and coverage reviews
  • Promote assertions to simulation and contribute to simulation strategy

This role centers on formal methods and hardware verification: abstraction techniques, formal methods, and verification model development (assertions and FV models) that are promoted into simulation workflows. The engineering work supports AWS Inferentia and Cloud-Scale Machine Learning Acceleration initiatives, aiming for high-performance, low-cost inference hardware.

The ideal candidate is a senior Formal Verification Engineer who has built and executed formal verification plans for state-of-the-art IP architectures. They are strong in developing checking algorithms, assertions, and FV models, applying formal methods and abstraction techniques, and collaborating with block designers and simulation teams for coverage and test plan reviews—especially in hardware contexts tied to AWS Inferentia and machine learning acceleration.

Develop formal verification plansimplement and verify state-of-the-art IP architecturesDevelop checking algorithmsassertionsand FV modelsPerform state of the art formal methods and abstraction techniquesParticipate in test plan and coverage reviewsPromote assertions to simulation and contribute to overall simulation strategyCommunicate and work with team members across multiple disciplines
formal verification plansformal verificationstate-of-the-art IP architecturesIP architecturesmicro-architectural understandingchecking algorithmsassertionsFV modelsformal methodsabstraction techniquestest plancoverage reviewssimulation strategyhardware designHardware Design EngineersAWS Inferentiamachine learning inference productCloud-Scale Machine Learning Acceleration
formal verification plansformal verificationIP architecturesstate-of-the-art IP architecturesblock designers collaborationmicro-architectural understandingchecking algorithmsassertionsFV modelsformal methodsabstraction techniquestest plan reviewscoverage reviewssimulationassertions promotion to simulationhardware designHardware Design EngineersAWS Inferentiamachine learning inference product
communicate across multiple disciplineswork with team members across multiple disciplinesparticipate in test plan and coverage reviews
Industry Aerospace
Job Function Perform formal verification for hardware IP supporting AWS machine learning acceleration hardware.
Role Subtype Hardware Design Engineer
Tech Domains Amazon Web Services, AI & Machine Learning
Sr. Formal Verification EngineerFormal Verification Engineerformal verification plansformal verificationstate-of-the-art IP architecturesIP architecturesmicro-architectural understandingchecking algorithmsassertionsFV modelsformal methodsabstraction techniquestest plancoverage reviewssimulation strategysimulationHardware Design EngineersAWS Inferentiamachine learning inference productCloud-Scale Machine Learning Acceleration

Must have hands-on experience with formal verification plans and implementing/verifying IP architectures, Must be able to develop checking algorithms, assertions, and FV models

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