✦ Luna Orbit — Engineering (Non-Software)

Sr. Signal & Power Integrity Engineer, Annapurna Labs - AI Silicon Packaging

at Amazon.com

📍 US, TX, Austin Unknown Posted March 26, 2026
Type Not Specified
Experience senior
Exp. Years Not specified
Education Not specified
Category Engineering (Non-Software)

This senior role involves leading SI/PI analysis and optimization for advanced packaging solutions in high-performance ASICs, ensuring signal integrity and reliability in data center applications.

  • Lead package SI/PI analysis
  • Design and optimize package stack-ups
  • Perform high-speed simulations
  • Collaborate with ASIC and packaging teams
  • Develop SI/PI modeling flows

Focus on package-level SI/PI, EMIR analysis, high-speed channel simulation, and advanced packaging technologies like 3D-IC and fan-out interposers.

The ideal candidate is a senior signal and power integrity engineer with expertise in advanced packaging, EMIR analysis, and high-speed channel simulation, capable of leading complex SI/PI projects for next-generation ASICs.

Signal & Power IntegrityAdvanced PackagingEMIR AnalysisHigh-Speed Channel SimulationModeling
3D-ICFan-outSilicon InterposerIR Drop mitigationElectromigration
Ansys RedHawk-SC 3DICCadence VoltusEMIR analysis tools
Signal IntegrityPower IntegrityAdvanced Packaging3D-ICFan-outSilicon InterposerEMIR AnalysisImpedance ControlHigh-Speed Channel SimulationDecoupling Strategy
Signal IntegrityPower IntegrityAdvanced Packaging3D-ICFan-outSilicon InterposerEMIR AnalysisImpedance ControlHigh-Speed Channel SimulationDecoupling StrategyIR DropElectromigrationModelingSimulation Tools
Analytical ThinkingProblem-solvingCollaborationTechnical CommunicationDetail-oriented
Industry Technology/Hardware
Job Function Leading signal and power integrity engineering for advanced ASIC packaging
Role Subtype Signal & Power Integrity Engineer
Tech Domains Electromigration, High-Speed Channel Simulation, Advanced Packaging, EMIR Analysis
Signal IntegrityPower IntegrityAdvanced Packaging3D-ICFan-outSilicon InterposerEMIR AnalysisImpedance ControlHigh-Speed Channel SimulationDecouplingIR DropElectromigrationModelingSimulation ToolsPackage-level SI/PIASICHardware DesignData Center ASICssignal integritypower integrityadvanced packaging3d-icfan-outsilicon interposeremir analysisimpedance controlhigh-speed simulationdecoupling

Lack of experience with SI/PI analysis, No background in advanced packaging, No experience with EMIR tools, On-site only without remote options, Poor collaboration or communication skills

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