✦ Luna Orbit — Engineering (Non-Software)

Sr. Silicon Design Verification Engineer

at Advanced Micro Devices

📍 San Jose, California, United States Hybrid Posted March 22, 2026
Type Full-Time
Experience senior
Exp. Years 5+ years
Education Not specified
Category Engineering (Non-Software)

This role involves verifying high-speed crypto, NoC, and DRAM memory controller IPs, leading verification strategies, and collaborating with design teams to ensure first-pass silicon success.

  • Verify high-speed IPs
  • Develop verification environments
  • Lead verification teams
  • Collaborate with design teams
  • Ensure silicon success

The technical scope includes architecture, development, and utilization of simulation and formal verification environments for complex IPs like crypto, NoC, and DRAM controllers, using industry-standard tools and methodologies.

The ideal candidate is a senior silicon verification engineer with extensive experience in high-speed IP verification, verification environment development, and team leadership, proficient with UVM, SystemVerilog, and formal methods, capable of leading verification efforts for complex SoC designs.

Verification of high-speed IPsArchitecting verification environmentsDeveloping simulation/formal environmentsLeading verification teamsExperience with UVMSystemVerilogSynopsys VCSCadence Xcelium
SoC verificationPerformance and QoS requirementsFormal verificationAssertion-based verificationVerification planning
Synopsys VCSCadence XceliumUVMSystemVerilog
Silicon design verificationhigh-speed cryptonocdram controllerLPDDR6HBM4simulationformal verificationverification environmentsUVMSystemVerilogSynopsys VCSCadence Xcelium
Silicon Design VerificationHigh-Speed CryptoNetwork-on-ChipDRAM Memory ControllerLPDDR6HBM4SimulationFormal VerificationVerification EnvironmentsBlock-Level VerificationSoC-Level VerificationUVMSystemVerilogSynopsys VCSCadence XceliumVerification StrategiesArchitectingDevelopingUtilizing
Technical LeadershipCommunication SkillsTeam ManagementStrategic ThinkingProblem-SolvingCollaborationMentoring
Industry Semiconductor
Job Function Silicon design verification for high-speed IPs in advanced SoCs
Role Subtype Silicon Verification Engineer
Tech Domains SystemVerilog, UVM, Synopsys VCS, Cadence Xcelium
Clearance Required None
Visa Sponsorship No
silicon design verificationhigh-speed cryptonetwork-on-chipDRAM memory controllerLPDDR6HBM4simulationformal verificationverification environmentsUVMSystemVerilogSynopsys VCSCadence Xceliumverification strategiesverification planningSoC verificationperformance requirementsQoSassertion-based verification

Less than 5 years of verification experience, No background in high-speed IP verification, Lack of experience with UVM or SystemVerilog, No leadership or team management experience

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