Position Details

Type Full-Time

Experience senior

Exp. Years Not specified

Education Undergrad degree required. Masters degree or related in computer engineering/Electrical Engineering is preferred.

Category Engineering (Non-Software)

About this role

Systems/FPGA design verification engineer focusing on HDL-based verification for FPGA/ACAP families, pre-silicon validation, and timing analysis.

Key Responsibilities

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Build test plan documentation
Build directed and random verification tests
Debug test failures with RTL/firmware engineers
Review functional and code coverage metrics

Technical Overview

HDL-centric role with Verilog/SystemVerilog/VHDL, UVM testbenches, Linux/Windows environments, and FPGA toolchains (Vivado, Xilinx).

Ideal Candidate

Senior FPGA/FPGA verification engineer with strong HDL (Verilog/SystemVerilog/VHDL) and FPGA toolchain experience, including Xilinx Vivado, timing analysis, and Linux environment familiarity.

Must-Have Skills

Fluent in Verilog/System Verilog/VHDL hardware design languagesExperience developing systems or IPs for FPGAsincluding simulatingand validating the designs.Experience using FPGA synthesis and implementation tools with a good understanding of output products at each stage.Understanding and analysis of timing reportsWorking knowledge of Linux environments

Nice-to-Have Skills

Experience with Xilinx Ultrascale or Versal FPGAsVivadoand Vivado DebugKnowledge of high-speed interfaces including QSFPPCIeUSBSATAGB EthernetDDR4/5LPDDR4/5HBMExposure to leadership or mentorship

Tools & Platforms

VerilogSystemVerilogVHDLLinuxWindowsVivadoXilinxVivado DebugPerlRubyShell

Required Skills

VerilogSystemVerilogVHDLLinuxWindowsUVMCC++VivadoXilinxVivado DebugHDLSystemCTLMPerlRubyShell

Hard Skills

VerilogSystemVerilogVHDLLinuxWindowsUVMCC++VivadoXilinxVivado DebugHDLSystemCTLMPerlRubyShell

Soft Skills

leadershipmentorshipcommunicationproblem-solving

Industry & Role

Industry Technology

Job Function Plan, build, and execute hardware verification platforms for pre-silicon and silicon validation of FPGA/ACAP families.

Role Subtype Verification Engineer

Tech Domains Verilog, SystemVerilog, VHDL, Linux, Windows, Vivado, Xilinx

Keywords for Your Resume

gpu design verification engineerverilogsystemverilogvhdllinuxwindowsuvmhdlsystemctlmvivadoxilinxvivado debugfpgapre-siliconrtltiming reportsclock domain crossingscriptingperlrubyshelloutput products

Deal Breakers

Undergraduate degree required; advanced degree preferred

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Sr. Systems Design Engineer, FPGA

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