Position Details
About this role
This role involves developing and verifying physical design for advanced semiconductor chips, focusing on digital implementation, physical verification, and tape out readiness.
Key Responsibilities
- Floorplan development
- Power and clock distribution
- Physical verification
- Synthesis and timing closure
- Tape out preparation
Technical Overview
The environment includes VLSI design, ASIC physical implementation, using tools like Cadence, GDSII, and scripting languages such as Tcl, Perl. The focus is on 40nm digital design processes.
Ideal Candidate
The ideal candidate is a highly experienced physical design engineer with over 10 years in digital implementation, familiar with advanced semiconductor design methodologies, scripting, and physical verification tools. They should possess strong technical ownership and teamwork skills.
Must-Have Skills
Nice-to-Have Skills
Tools & Platforms
Required Skills
Hard Skills
Soft Skills
Industry & Role
Keywords for Your Resume
Deal Breakers
Less than 10 years of experience, Lack of experience with 40nm digital implementation, No scripting skills (Tcl, SKILL, Perl)
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